Three-Input Gates for Logic Synthesis

Most logic synthesis algorithms work on graph representations of functions with nodes associated arbitrary expressions or simple and iteratively optimize such graphs. While recent multilevel efforts focused primarily graphs 2-input as AND OR gates, the recently proposed paradigm Majority-Inverter Graphs (MIGs) instead uses 3-input Majority gate node function. As this technique proved to be a success, it is natural ask: are there other gates better suited for synthesis? Motivated by question, we investigate relative advantages constituents networks. We consider representative from each ten nondegenerate NPN classes study how powerful they at representing Boolean functions. Using SAT-based exact synthesis, evaluate using minimum number (together inverters) needed synthesize all 4-input subset frequent 5-input 6-input show that Dot(x,y,z) \mathrel \mathop:= x ⊕(z Vxy) outperforms rest in terms expressive power. further confirm observation showing Dot-Inverter Graph more than 14% smaller compared MIG EPFL benchmarks.